SN74FB2041ARCRG3
The SN74FB2041 is a 7-bit transceiver designed to translate signals between TTL and backplane transceiver logic (BTL) environments. The device is specifically designed to be compatible with IEEE Std 1194.1-1991. The B\ port operates at BTL signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is high and OEB\ is low, the B\ port is active and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or VCC is less than 2.1 V, the B\ port is turned off. The enable/disable logic partitions the device as two 3-bit sections and one 1-bit section. The A port operates at TTL signal levels and has split input and output pins. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state. The pins TMS, TCK, TDI, and TDO are nonfunctional, i.e., not intended for use with the IEEE Std 1149.1 (JTAG) test bus. TMS and TCK are not connected and TDI is shorted to TDO. BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
供应商 | 供应商型号 | 发货地 | 库存 | 起订量 | 币别 | 1+ | 10+ | 100+ | 1K+ | 10K+ | |
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Digi-Key | SN74FB2041ARCRG3-ND | 美国 | - | 1 | CNY* | - | - | - | - | - | ![]() |
Avnet | SN74FB2041ARCRG3 | 美国 | - | 500 | CNY* | 登录后可查看详细价格 | ![]() | ||||
America II | SN74FB2041ARCRG3 | 美国 | 301 | 1 | CNY* | 登录后可查看详细价格 | ![]() | ||||
Abacus | SN74FB2041ARCRG3 | 美国 | - | 1 | CNY* | 登录后可查看详细价格 | ![]() |