| Maximum Propagation Delay Time @ Maximum CL (ns) | 50@4.5V|250@2V|43@6V |
| PCB changed | 16 |
| HTS | 8542.39.00.01 |
| Number of Elements per Chip | 1 |
| ECCN (US) | EAR99 |
| Parallel Enable Input | Yes |
| Number of Stages | 4 |
| Direction Type | Bi-Directional |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Package | PDIP |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 325 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Counter |
| Number of Count Input Enables | 2 |
| Triggering Type | Positive-Edge |
| Package Height | 5.08(Max) - 0.51(Min) |
| Number of Element Outputs | 4 |
| Maximum Operating Supply Voltage (V) | 6 |
| EU RoHS | Compliant |
| Number of Selection Inputs per Element | 0 |
| Number of Element Inputs | 4 |
| Package Length | 19.69(Max) |
| Terminal Count Output | Yes |
| Standard Package Name | DIP |
| Operation Mode | Down Counter|UP Counter |
| Pin Count | 16 |
| Mounting | Through Hole |
| Type | Binary |
| Reset Type | Asynchronous |
| Lead Shape | Through Hole |
| Part Status | Active |
| Packaging | Tube |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | HC |
| Package Width | 6.6(Max) |
| Maximum Quiescent Current (mA) | 0.008 |
| Minimum Operating Supply Voltage (V) | 2 |
