| Number of Channels per Chip | 3 |
| Fabrication Technology | CMOS |
| PCB changed | 14 |
| Maximum Quiescent Current (uA) | 5 |
| Number of Elements per Chip | 1 |
| Package Width (mm) | 6.6(Max) |
| Minimum Operating Temperature (°C) | -55 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Package | PDIP |
| Maximum High Level Output Current (mA) | -4.2(Min) |
| Absolute Propagation Delay Time (ns) | 110 |
| Logic Function | Dual Complementary Pair Plus Inverter |
| Polarity | Inverting |
| Maximum Operating Supply Voltage (V) | 18 |
| Package Height (mm) | 5.08(Max) - 0.51(Min) |
| EU RoHS | Compliant |
| Number of Inputs per Chip | 3 |
| Number of Outputs per Chip | 3 |
| Standard Package Name | DIP |
| Maximum Low Level Output Current (mA) | 4.2(Min) |
| Pin Count | 14 |
| Mounting | Through Hole |
| Package Length (mm) | 19.69(Max) |
| Lead Shape | Through Hole |
| Packaging | Tube |
| Typical Operating Supply Voltage (V) | 3.3|5|9|12|15 |
| Logic Family | CD4000 |
| Minimum Operating Supply Voltage (V) | 3 |
