Typical Input Capacitance @ Vds (pF) | 750@16V |
Configuration | Dual Dual Drain |
Typical Turn-Off Delay Time (ns) | 32 |
PCB changed | 8 |
HTS | 8541.29.00.95 |
Maximum Gate Source Leakage Current (nA) | 100 |
Number of Elements per Chip | 2 |
ECCN (US) | EAR99 |
Typical Rise Time (ns) | 12 |
Maximum Power Dissipation (mW) | 1100 |
Channel Mode | Enhancement |
Typical Turn-On Delay Time (ns) | 5.5 |
Automotive | No |
Minimum Operating Temperature (°C) | -55 |
Maximum Operating Temperature (°C) | 150 |
Supplier Package | Chip FET |
Maximum IDSS (uA) | 1 |
Typical Fall Time (ns) | 23 |
Package Height | 1.05 |
Channel Type | P |
EU RoHS | Compliant |
Maximum Continuous Drain Current (A) | 2.9 |
Military | No |
Maximum Drain Source Voltage (V) | 20 |
Maximum Gate Source Voltage (V) | ±8 |
Maximum Drain Source Resistance (mOhm) | 80@4.5V |
Package Length | 3.05 |
Standard Package Name | Chip FET |
Pin Count | 8 |
Mounting | Surface Mount |
Part Status | Active |
Product Category | Power MOSFET |
Packaging | Tape and Reel |
Maximum Gate Threshold Voltage (V) | 1.5 |
Package Width | 1.65 |
Typical Gate Charge @ Vgs (nC) | 7.6@4.5V |