| Number of Channels per Chip | 8 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 10@5V |
| PCB changed | 20 |
| Output Type | 3-State |
| Maximum Quiescent Current (uA) | 4 |
| Number of Elements per Chip | 1 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Package | SSOP |
| Maximum High Level Output Current (mA) | -24 |
| Latch Mode | Transparent |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 12.5 |
| Propagation Delay Test Condition (pF) | 50 |
| Package Height | 1.75 |
| Polarity | Non-Inverting |
| Maximum Operating Supply Voltage (V) | 5.5 |
| EU RoHS | Compliant |
| Number of Selection Inputs per Element | 0 |
| Set/Reset | No |
| Number of Inputs per Chip | 8 |
| Number of Outputs per Chip | 8 |
| Package Length | 7.2 |
| Standard Package Name | SOP |
| Maximum Low Level Output Current (mA) | 24 |
| Pin Count | 20 |
| Mounting | Surface Mount |
| Type | D-Type |
| Number of Output Enables per Element | 1 |
| Number of Input Enables per Element | 1 |
| Bus Hold | No |
| Lead Shape | Gull-wing |
| Part Status | Obsolete |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | ACT |
| Package Width | 5.3 |
| Minimum Operating Supply Voltage (V) | 4.5 |
