Maximum Propagation Delay Time @ Maximum CL (ns) | 16.5@3V to 3.6V|10@4.5V to 5.5V |
PCB changed | 16 |
Output Type | 3-State |
Number of Elements per Chip | 1 |
ECCN (US) | EAR99 |
Parallel Enable Input | No |
Number of Stages | 8 |
Direction Type | Uni-Directional |
Minimum Operating Temperature (°C) | -40 |
Maximum Operating Temperature (°C) | 125 |
Supplier Package | DHVQFN EP |
Process Technology | CMOS |
Absolute Propagation Delay Time (ns) | 20.1 |
Propagation Delay Test Condition (pF) | 50 |
Logic Function | Shift Register |
Number of Count Input Enables | 0 |
Triggering Type | Positive-Edge |
Package Height | 0.95(Max) |
Number of Element Outputs | 9 |
Maximum Operating Supply Voltage (V) | 5.5 |
EU RoHS | Compliant |
Number of Selection Inputs per Element | 0 |
Number of Element Inputs | 1 |
Package Length | 3.6(Max) |
Terminal Count Output | No |
Operation Mode | Serial to Serial/Parallel |
Pin Count | 16 |
Mounting | Surface Mount |
Reset Type | Asynchronous |
Part Status | Active |
Packaging | Tape and Reel |
Typical Operating Supply Voltage (V) | 5 |
Logic Family | VHC |
Package Width | 2.6(Max) |
Maximum Quiescent Current (mA) | 0.004 |
Minimum Operating Supply Voltage (V) | 2 |