| Number of Channels per Chip | 8 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 30@4.5V |
| PCB changed | 20 |
| HTS | 8542.39.00.01 |
| Number of Elements per Chip | 1 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Package | SO |
| Maximum High Level Output Current (mA) | -4 |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 51 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | D-Type Bus Interface |
| Triggering Type | Positive-Edge |
| Package Height | 2.45(Max) |
| Number of Element Outputs | 8 |
| Polarity | Non-Inverting |
| Maximum Operating Supply Voltage (V) | 5.5 |
| EU RoHS | Compliant |
| Set/Reset | Master Reset |
| Number of Element Inputs | 8 |
| Package Length | 13(Max) |
| Maximum Low Level Output Current (mA) | 4 |
| Pin Count | 20 |
| Mounting | Surface Mount |
| Input Signal Type | Single-Ended |
| Bus Hold | No |
| Part Status | Active |
| Packaging | Bulk |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | HCT |
| Package Width | 7.6(Max) |
| Maximum Quiescent Current (mA) | 0.008 |
| Minimum Operating Supply Voltage (V) | 4.5 |
