| Program Memory Type | Flash |
| Maximum Expanded Memory Size | 1GB |
| Data Bus Width (bit) | 32 |
| SPI | 1 |
| Special Features | CAN Controller |
| Supplier Package | TFBGA |
| Instruction Set Architecture | RISC |
| Core Architecture | ARM |
| Family Name | LPC1700 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Maximum Clock Rate (MHz) | 100 |
| EU RoHS | Compliant |
| PWM | 1 |
| Standard Package Name | BGA |
| Pin Count | 100 |
| Mounting | Surface Mount |
| USART | 0 |
| CAN | 2 |
| Lead Shape | Ball |
| Ethernet | 1 |
| Packaging | Tape and Reel |
| Program Memory Size | 512KB |
| Typical Operating Supply Voltage (V) | 3.3 |
| Number of DACs | Single |
| Programmability | Yes |
| PCB changed | 100 |
| ECCN (US) | EAR99 |
| Maximum Power Dissipation (mW) | 1500 |
| Device Core | ARM Cortex M3 |
| ADC Channels | 8 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| No. of Timers | 4 |
| Package Height | 0.8(Max) |
| I2C | 3 |
| Interface Type | CAN/Ethernet/I2C/I2S/SPI/SSP/UART/USB |
| Maximum CPU Frequency (MHz) | 100 |
| Number of ADCs | Single |
| USB | 1 |
| RAM Size | 64KB |
| UART | 4 |
| ADC Resolution (bit) | 12 |
| I2S | 1 |
| Package Length | 9.1(Max) |
| CECC Qualified | No |
| Watchdog | 1 |
| Part Status | Active |
| Number of I/Os | 70 |
| Package Width | 9.1(Max) |
| Minimum Operating Supply Voltage (V) | 2.4 |
