| Program Memory Type | SRAM |
| Provider Name | Altera/CAST, Inc/Bitec/Eureka Technology Inc/El Camino GmbH |
| Logic Elements | 531200 |
| Total Number of Block RAM | 64+1280 |
| Dedicated DSP | 128 |
| Tradename | Stratix |
| Supplier Package | FC-FBGA |
| Number of I/O Banks | 24 |
| Device Logic Units | 531200 |
| IP Core | V-by-One HS|Viterbi Compiler, Low-Speed/Hybrid Serial Decoder|SD/MMC SPI|UART |
| Family Name | Stratix® IV GX |
| EMACs | 1 |
| Maximum Operating Supply Voltage (V) | 0.93 |
| EU RoHS | Compliant with Exemption |
| External Memory Interface | DDR3 SDRAM|DDR2 SDRAM|RLDRAM II|QDRII+SRAM |
| Supplier Temperature Grade | Industrial |
| In-System Programmability | No |
| Standard Package Name | BGA |
| Reprogrammability Support | No |
| Pin Count | 1932 |
| Mounting | Surface Mount |
| Lead Shape | Ball |
| Copy Protection | Yes |
| Number of Registers | 424960 |
| Speed Grade | 3 |
| User I/Os | 904 |
| Programmability | Yes |
| PCB changed | 1932 |
| ECCN (US) | 3A001.a.7.a |
| PCIe | 4 |
| SERDES Channels | 98 |
| Number of Global Clocks | 16 |
| Operating Supply Voltage (V) | 0.9 |
| Transceiver Speed (Gbps) | 8.5 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 100 |
| Process Technology | 40nm |
| Single-Ended I/O Standards | CMOS|LVTTL|PCI|PCI-X |
| Package Height | 2.8 |
| I/O Voltage (V) | 3|1.2|1.5|2.5|1.8 |
| Differential I/O Standards | LVPECL|LVDS |
| Device Number of DLLs/PLLs | 12 |
| Number of Multipliers | 1024 (18x18) |
| Embedded Memory (Kbit) | 27376 |
| Package Length | 45 |
| Transceiver Channels | 48 |
| Part Status | Active |
| Package Width | 45 |
| Shift Registers | Utilize Memory |
| Minimum Operating Supply Voltage (V) | 0.87 |
