Etron Technology

Fast clock rate: 250/200/166 MHz Differential Clock CK & CK# input 4 Bi-directional DQS. Data transactions on both edges of DQS (1DQS / Byte) DLL aligns DQ and DQS transitions Edge aligned data & DQS output Center aligned data & DQS input 4 internal banks, 1M x 32-bit for each bank Programmable mode and extended mode registers CAS Latency: 2, 2.5, 3, 4 Burst length: 2, 4, 8, and Full Page Burst Type: Sequential & Interleave Full page burst length for sequential type only Start address of full page burst should be even All inputs except DQ’s & DM are at the positive edge of the system clock No Write-Interrupted by Read function 4 individual DM control for write masking only Auto Refresh and Self Refresh 4096 refresh cycles / 32ms Power supplies : VDD = 2.5V ± 5% VDDQ = 2.5V ± 5% Interface : SSTL_2 I/O compatible Standard 144-ball FBGA package Pb-free package is available