| Maximum Propagation Delay Time @ Maximum CL (ns) | 7@2.7V|5.5@5V|6@3.3V |
| PCB changed | 4 |
| Maximum Quiescent Current (uA) | 200 |
| Number of Elements per Chip | 1 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Package | X2-DFN EP |
| Maximum High Level Output Current (mA) | -32 |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 10.5 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | AND |
| Package Height | 0.28 |
| Number of Element Outputs | 1 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| EU RoHS | Compliant |
| Number of Selection Inputs per Element | 0 |
| Number of Element Inputs | 2-IN |
| Package Length | 0.8 |
| Standard Package Name | DFN |
| Maximum Low Level Output Current (mA) | 32 |
| Pin Count | 4 |
| Mounting | Surface Mount |
| Number of Output Enables per Element | 0 |
| Lead Shape | No Lead |
| Part Status | Active |
| Packaging | Tape and Reel |
| Typical Operating Supply Voltage (V) | 5|3.3|2.5|1.8 |
| Logic Family | LVC |
| Package Width | 0.8 |
| Minimum Operating Supply Voltage (V) | 1.65 |
