描述：TTL/CMOS input select control signal for the LVDS LOUT0-LOUT2 outputs. LSEL, DSEL, and LEN are used together to decode the selection and post divider of the LVDS outputs. Internal 25kΩ pull-up. See LVDS Output Post-Divider and Frequency Select Table for proper decoding. The threshold voltage VTH = VCC/2. The default logic is HIGH.